Unit 1
8 hrsRegister Transfer Language, Bus and Memory Transfers, Bus Architecture, Arithmetic Logic, Shift Microoperation, Arithmetic Logic Shift Unit, Design of Fast adders, Arithmetic Algorithms (addition, subtraction, Booth Multiplication).
BCA · Sem 3 (Core)
Register Transfer Language, Bus and Memory Transfers, Bus Architecture, Arithmetic Logic, Shift Microoperation, Arithmetic Logic Shift Unit, Design of Fast adders, Arithmetic Algorithms (addition, subtraction, Booth Multiplication).
Hardwired & Micro Programmed (Control UNIT) Fundamental Concepts (Register Transfers, performing of arithmetic or logical operations, fetching a word from memory, storing a word in memory), Execution of a complete instruction, Multiple-Bus organization, Hardwired Control, Micro programmed control(Microinstruction, Microprogram sequencing, Wide-Branch addressing, Microinstruction with Next-address field, Prefetching Microinstruction).
Processor Organization- General register organization, Stack organization, Addressing mode, Instruction format, Data transfer & manipulations, Program Control, Reduced Instruction Set Computer.
I/O Interface, Modes of transfer, Interrupts & Interrupt handling, Direct Memory access, Input-Output processor, Serial Communication.
Memory Hierarchy, Main Memory (RAM and ROM Chips), Auxiliary memory, Cache memory, Virtual Memory, Memory management hardware.
After completion of the course student will be able to:
This subject is on page 9 of the original AKTU PDF.